Dec, 31, 2025

Vol.58 No.6

학회 연락처

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  • The Korean Society of Surface Science and Engineering
  • Volume 58(6); 2025
  • Article

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The Korean Society of Surface Science and Engineering 2025;58(6):352-360. Published online: Dec, 31, 2025

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이단계 합성법으로 제작된 p-형 셀레늄화 텅스텐(WSe2) 트랜지스터의 전기적 및 시냅스 특성

  • 이현지a,b, 정태원a, 한상윤a, 김동현a, 박상희b,*
    a국가물산업클러스터사업단 물산업실증화처, b국립창원대학교 에너지화학공학과
초록

The availability of highly reliable p-type two-dimensional (2D) semiconductors is essential for implementing complementary logic circuits, low-power electronics, and multi-functional devices. Despite significant progress in 2D field-effect transistor (FET) research, studies on p-type materials and their device applications remain insufficient. In this study, we report on the fabrication and electrical characterization of p-type FET based on 2D tungsten diselenide (2D-WSe2) synthesized via a two-step synthetic method. The optimized process involving sequential tungsten trioxide (WO3) precursor deposition and selenization, yielded few-layer 2D-WSe2 films with controlled thickness. The fabricated back-gate transistors exhibited a clear p-type conduction behavior, with an on/off current ratio exceeding 103, a hole mobility of 0.03 cm2/V·s, and a low gate leakage current of < 0.2 nA. Also, the synaptic characteristics were evaluated under successive pulse measurements, and stable operation was confirmed up to 400 cycles.

키워드 2D-WSe2; Two-step CVD selenization; Back-gate transistor; Synatpic properties; Field-effect mobility.