Aug, 31, 2024

Vol.57 No.4

학회 연락처

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  • The Korean Society of Surface Science and Engineering
  • Volume 57(3); 2024
  • Article

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The Korean Society of Surface Science and Engineering 2024;57(3):165-178. Published online: Jul, 8, 2024

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반도체 메모리 소자 제조에서 High Aspect Ratio Contact 식각 연구 동향

  • 탁현우a, 박명호b, 이준수c, 최찬혁b, 김봉선a, 장준기a, 김은구d, 김동우a, 염근영a,b,c,*
    a성균관대학교 신소재공학과, b성균관대학교 나노과학기술학과, c성균관대학교 태양광시스템공학협동과정, d성균관대학교 반도체디스플레이공학과
초록

In semiconductor memory device manufacturing, the capability for high aspect ratio contact (HARC) etching determines the density of memory device. Given that there is no standardized definition of "high" in high aspect ratio, it is crucial to continuously monitor recent technology trends to address technological gaps. Not only semiconductor memory manufacturing companies such as Samsung Electronics, SK Hynix, and Micron but also semiconductor manufacturing equipment companies such as Lam Research, Applied Materials, Tokyo Electron, and SEMES release annual reports on HARC etching technology. Although there is a gap in technological focus between semiconductor mass production environments and various research institutes, the results from these institutes significantly contribute by demonstrating fundamental mechanisms with empirical evidence, often in collaboration with industry researchers. This paper reviews recent studies on HARC etching and the study of dielectric etching in various technologies.

키워드 High Aspect Ratio Contact(HARC) Etching; Dielectric Etching; Silicon Oxide Etching; Silicon Nitride Etching; Memory Device Manufacturing.